Liquid crystal display devices in various display modes are now being proposed for increase in viewing angle. Examples of such modes include MVA mode, which is one kind of VA (vertical alignment) mode (for example, refer to Patent Document 1). FIG. 24 is a schematic cross-sectional view of a MVA mode liquid crystal display device disclosed in Patent Document 1, taken along dashed line X-Y in FIG. 25. FIG. 24(a) shows the cross section of the device when no voltage is applied. FIG. 24(b) shows the cross section of the device when a voltage of a threshold value or more is applied. As shown in FIG. 24, liquid crystal molecules 6 are aligned vertically to substrate surfaces when no voltage is applied, but when a voltage of a threshold value or more is applied, the liquid crystal molecules 6 are tilted toward a projection 2, which is arranged on a common electrode 16, or a slit 1, which is an opening of a pixel electrode 13. The dotted line in FIG. 24(b) is a line of electric force when a voltage is applied.
FIG. 25 is a planar view schematically showing one pixel of the MVA mode liquid crystal display device disclosed in Patent Document 1. The MVA mode liquid crystal display device in Patent Document 1 includes a pair of substrates and a liquid crystal layer interposed therebetween. In an active matrix substrate of the pair of substrates, a signal line (source bus line) 21 and a scanning line (gate bus line) 22 are arranged in the vertical and horizontal directions, respectively, and near at an intersection of the scanning line 21 and the scanning line 22, a TFT 23, which is a switching element, is arranged, as shown in FIG. 25. Each pixel is surrounded by these signal lines 21 and the scanning lines 22. In accordance with this pixel shape, the pixel electrode 13 is arranged. The pixel electrode 13 is electrically connected to a drain electrode of the TFT 23 through a contact hole 24. A storage capacitor wiring (Cs wiring) 25 is arranged to be parallel to the scanning line 22. The pixel electrode 13 is provided with an opening (slit) 1 where no electrode is arranged, as alignment control means. On the common electrode 16 in a counter substrate, the projection 2 made of a low-dielectric (insulating) material and a sub-projection 2a branched from the projection 2 are arranged as alignment control means. The slit 1 and the projection 2 are alternately arranged in parallel to each other and regulate an alignment direction of the liquid crystal molecules 6. A region between the slit 1 and the projection 2 is a domain where the alignment is controlled.
According to this embodiment, one pixel is divided into a plurality of domains, and the tilt direction of the liquid crystal molecules 6 is regulated to four different directions.
The liquid crystal molecules 6 near the slit 1 and the projection 2 are aligned in directions shown by the single arrows in FIG. 25, when a voltage is applied between the pixel electrode 13 and the common electrode 16. That is, the tilt directions of the liquid crystal molecules 6 are directions at 45° or −45° with respect to polarization axes of polarizers, each of which is attached to one surface of each substrate. In FIG. 25, each of the double arrows perpendicular to each other show a polarization axis of the polarizer. The liquid crystal molecules 6 positioned near the middle between the slit I and the projection 2 are aligned in accordance with the direction where the liquid crystal molecules 6 near the slit 1 and the projection 2 are tilted. Thus, in the MVA mode, the tilt is propagated, and thereby each of the liquid crystal molecules 6 is finally aligned vertically to the slit 1 or the projection 2. Thus, the multi-domain configuration is achieved by aligning the liquid crystal molecules to four different directions when a voltage is applied. As a result, excellent display with wide viewing angle can be provided.
However, if a proportion of the slit 1 or the projection 2 in the pixel is large, the entire liquid crystal display becomes darker than normal. In this case, a transmittance can be increased by increasing an interval between the slit 1 and the projection 2. However, in such a case, the liquid crystal molecules 6 that are away from the slit 1 or the projection 2 is not determined at the moment when a voltage is applied and so, they respond late because the liquid crystal molecules 6 that are near the slit 1 or the projection 2 starts to be tilted first and the tilt is propagated, as mentioned above.
For this problem, a method in which a fine structure pattern is further formed as a structure pattern for alignment control in order to improve the response speed is proposed (for example, refer to Patent Document 2). FIG. 26 is a planar view schematically showing one pixel of a MVA mode liquid crystal display device disclosed in Patent Document 2. Similarly to the liquid crystal display device in Patent Document 1 shown in FIG. 25, the MVA mode liquid crystal display device in Patent Document 2 also includes a pair of substrates and a liquid crystal layer interposed therebetween. Further, as shown in FIG. 26, in an active matrix substrate of the pair of substrates, a signal line (source bus line) 21 and a scanning line (gate bus line) 22 are arranged in the vertical and horizontal directions, respectively and near at an intersection of the signal line 21 and the scanning line 22, a TFT 23, which is a switching element, is arranged. Each pixel is surrounded by these signal lines 21 and the scanning lines 22. In accordance with this pixel shape, a pixel electrode 13 is arranged. The pixel electrode 13 is electrically connected to a drain electrode of the TFT 23 through a contact hole 24. A storage capacitor wiring (Cs wiring) 25 is arranged to be parallel to the scanning line 22. The pixel electrode 13 is provided with an opening (slit) 1 where no electrode is arranged as alignment control means. On a common electrode in a counter substrate, a projection 2 made of a low dielectric (insulating) material is arranged as alignment control means. However, in the liquid crystal display device in Patent Document 2, the pixel electrode 13 is provided with not only a simple linear cut-out pattern (slit) 1a but also a fine cut-out pattern 1b, which is periodically formed to be perpendicular to the cut-out pattern 1a. The fine cut-out pattern 1b extends to a region where the projection pattern (projection) 2 is arranged on the counter substrate.
A function of such a fine cut-out pattern is mentioned with reference to FIG. 27. FIG. 27 is a cross-sectional view schematically showing one pixel in the MVA mode liquid crystal display device disclosed in Patent Document 2, taken along line V-Z. FIG. 27(a) shows the pixel when almost no voltage is applied. FIG. 27(b) shows the pixel when a sufficient voltage is applied. Liquid crystal molecules 6 positioned between the common electrode 16 and the pixel electrode 13 are pre-tilted toward the fine cut-out pattern 1b when almost no voltage is applied, as shown in FIG. 27(a). Then, as shown in FIG. 27(b), the liquid crystal molecules 6 are tilted vertically to the paper when a sufficient voltage is applied. This is because the liquid crystal molecules 6 that are tilted to the horizontal direction are interfered with each other and tilted to an extending direction of the fine cut-out pattern 1b. Attributed to such a function of the fine cut-out pattern 1b, the response speed of the liquid crystal is improved.
The response speed of the liquid crystal is improved, attributed to such a fine cut-out pattern as in the liquid crystal display device in Patent Document 2, but the transmittance is reduced in some cases. That's why this embodiment has still room for improvement.    [Patent Document 1]
Japanese Kokai Publication No. Hei-11-242225    [Patent Document 2]
Japanese Kokai Publication No. 2002-107730